DV1465 / DV1505 / DV1511:

Compiler and Interpreter Technology

08:15 Friday 8th April, 2016

Target code.

Table of Contents
Translation schemesTypes
Jump EncodingInline Assembly

1. Comparison with textbook

Design Issue
Do we represent control-flow explicitly inside blocks (with jumps) or implicitly in the block data-structure?

2. Code Generation as two separate problems

3. Translating 3-address instructions to x86_64

4. What the translated instruction must achieve

image/svg+xml L3: RAM L4+: OS L2: Cache L1: Cache L0: Registers ALU x=y+z/7 y z

5. A scheme for implementing 3-address instructions

t2 <- t1 + x
movq _t1, %rax; // Load movq _x, %rbx; // Load addq %rax, %rbx; // Actual operation movq %rbx, _t2; // Store

6. Implementation scheme for floating-point

t2 <- t1 + x
fldq _x; // Load fldq _t1; // Load faddp; // Operation + Pop fstpq _t2; // Store + Pop

7. Improving the scheme

8. Handling control-flow in the target.

9. Control-flow example

10. Comparitor operations

FlagMeaning
ZFZero - the last result was exactly zero.
CFCarry - the most significant bit carried/borrowed.
OFOverflow - the signed value would not fit in the register.
SFSign - the most significant bit was set.
ConditionOperationTest
x=yt1 <- x - yZero flag set
x!=yt1 <- x - yZero flag not set
x<yt1 <- x - yNegative flag set
x<=yt1 <- y - xNegative flag not set

11. Boolean Expressions

12. If-then-else

movq _x, %eax; subq $10, %eax; jns elsebranch; movq $5, %eax; subq _y, %eax; js truebranch; elsebranch: ... stmt2 ... jmp exitstmt; truebranch: ... stmt1 ... exitstmt:

13. Shortcut Boolean OR

movq _x, %eax; subq $10, %eax; js truebranch; movq $5, %eax; subq _y, %eax; js truebranch; elsebranch: ... stmt2 ... jmp exitstmt; truebranch: ... stmt1 ... exitstmt:

14. What order to arrange the blocks in

This is easier than it looks: use a counter to allocate a slot number for the blocks.

Perform a search across the CFG, marking blocks as they are processed

Start with all blocks unallocated. While blocks are unallocated Find an earliest unallocated block (ties don't matter). Allocate increasing numbers on a longest non-looping path.
[Not in the Dragon book as they never do it this way around].

Algorithm is very simple. Proof of why it works is subtle. There is a variation of it in my PhD Thesis (non-obvious combination of chapters 3 and 4). This a very unsatisfactory reference for something simple - certainly invented before in another context. Please email me if you find another source for this algorithm.

Note to self: this is iterative deepening with a BFS when starting a fresh chain

Break (15mins)





Intermission

15. Types

16. Type Conversion

17. Type Inference and Checking

18. The eternal flame war

19. Untyped languages

20. Type Widths

21. Inline Assembly

#include <stdio.h> int main(int argc, char **argv) { printf("Alpha\n"); asm("xorl %eax, %eax\n\t"); printf("omega\n"); }

22. Inline Assembly: What happens

.section __TEXT,__text,regular,pure_instructions .macosx_version_min 10, 11 .globl _main .align 4, 0x90 _main: ## @main .cfi_startproc ## BB#0: pushq %rbp Ltmp0: .cfi_def_cfa_offset 16 Ltmp1: .cfi_offset %rbp, -16 movq %rsp, %rbp Ltmp2: .cfi_def_cfa_register %rbp subq $32, %rsp leaq L_.str(%rip), %rax movl %edi, -4(%rbp) movq %rsi, -16(%rbp) movq %rax, %rdi movb $0, %al callq _printf ## InlineAsm Start xorl %eax, %eax
## InlineAsm End leaq L_.str.1(%rip), %rdi movl %eax, -20(%rbp) ## 4-byte Spill movb $0, %al callq _printf xorl %ecx, %ecx movl %eax, -24(%rbp) ## 4-byte Spill movl %ecx, %eax addq $32, %rsp popq %rbp retq .cfi_endproc .section __TEXT,__cstring,cstring_literals L_.str: ## @.str .asciz "Alpha\n" L_.str.1: ## @.str.1 .asciz "omega\n" .subsections_via_symbols

23. Inline Assembly: Explanation

24. Inline Assembly: Clobbers

asm("pushl %eax\n\t" "xorl %eax, %%eax\n\t" "popl %eax");
asm("xorl %%eax, %%eax" : : : "%eax");

25. Inline Assembly: Constraints

int x=10,y; asm("movl %1, %%eax\n\t" "addl %%eax, %%eax;\n\t" "movl %%eax, %0" : "=r"(y) : "r"(x) : "%eax");

26. Inline Assembly: Translation Approaches

asm("movl 4(%0), %%eax\n\t" "addl 0(%0), %%eax;\n\t" "movl %%eax, 32(%0)" : : "r"(storage) : "%eax,%ebx");

27. Inline Assembly: Translation Approaches

asm("... 3-address instruction 1 ...\n\t" "... 3-address instruction 2 ... \n\t" : : "r"(storage) : "%eax,%ebx");

28. Inline Assembly: Control flow

29. Summary of inline assembly